AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit

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ID 683265
Date 1/27/2016
Public
Document Table of Contents
Document Table of Contents x
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit x
1.1. Introduction 1.2. Boot Overview 1.3. Boot Duration 1.4. Boot Debugging 1.5. Boot Examples 1.6. Document Revision History
1.1. Introduction x
1.1.1. Prerequisite
1.2. Boot Overview x
1.2.1. Boot Flow 1.2.2. Boot Sources 1.2.3. Boot Clocks
1.2.1. Boot Flow x
1.2.1.1. Boot ROM 1.2.1.2. Preloader 1.2.1.3. Bootloader
1.2.2. Boot Sources x
1.2.2.1. Boot from SD/MMC 1.2.2.2. Boot from QSPI 1.2.2.3. Boot from NAND 1.2.2.4. Boot from FPGA 1.2.2.5. FPGA Fallback Boot 1.2.2.6. Boot from RAM on Warm Reset
1.3. Boot Duration x
1.3.1. Optimizing Boot Duration 1.3.2. Boot Duration Measurements
1.3.1. Optimizing Boot Duration x
1.3.1.1. Hardware Powerup Sequence 1.3.1.2. Boot ROM 1.3.1.3. Preloader 1.3.1.4. Bootloader 1.3.1.5. Linux Kernel 1.3.1.6. Init Scripts
1.4. Boot Debugging x
1.4.1. Boot ROM 1.4.2. Preloader 1.4.3. U-Boot
1.4.2. Preloader x
1.4.2.1. Debugging the Preloader from ARM DS-5 AE
1.5. Boot Examples x
1.5.1. Bare-Metal Application 1.5.2. Booting from SD/MMC – Custom Partition 1.5.3. Booting from SD/MMC – FAT Partition 1.5.4. Booting from QSPI Flash 1.5.5. Booting from FPGA
1.5.5. Booting from FPGA x
1.5.5.1. Overview 1.5.5.2. Hardware Design 1.5.5.3. Building and Running the Example
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit

1.3.1.3. Preloader

The Preloader duration is influenced by the following elements:

  • Location of next boot stage
  • Size of next boot stage image
  • Speed of SDRAM (since Preloader loads the image from Flash to SDRAM)
  • Speed of Flash
  • Various Preloader options:
    • SDRAM scrubbing
    • Hardware diagnostic
    • Checking the CRC of the next boot stage image
    • Serial logging
    • Program FPGA

In order to reduce the Preloader duration, the above parameters may be tweaked. For example:

  • Reduce the size of the next boot stage (for example remove networking support from U-Boot if not needed)
  • Use a faster flash (it requires changing Preloader source code – option is not available in Preloader Generator)
  • Disable hardware diagnostic if enabled (uncheck HARDWARE_DIAGNOSTIC in Preloader Generator)
  • Disable serial console output - (uncheck SERIAL_SUPPORT in Preloader Generator)
  • Disable CRC of the next boot stage image (uncheck CHECKSUM_NEXT_IMAGE in Preloader Generator)

If the FPGA programming is selected in the Preloader, then the following also impacts the duration:

  • Location of FPGA Image (QSPI or SD Card FAT partition)
  • Size of the FPGA Image (compression may reduce it significantly)
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