AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit

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ID 683265
Date 1/27/2016
Public
Document Table of Contents
Document Table of Contents x
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit x
1.1. Introduction 1.2. Boot Overview 1.3. Boot Duration 1.4. Boot Debugging 1.5. Boot Examples 1.6. Document Revision History
1.1. Introduction x
1.1.1. Prerequisite
1.2. Boot Overview x
1.2.1. Boot Flow 1.2.2. Boot Sources 1.2.3. Boot Clocks
1.2.1. Boot Flow x
1.2.1.1. Boot ROM 1.2.1.2. Preloader 1.2.1.3. Bootloader
1.2.2. Boot Sources x
1.2.2.1. Boot from SD/MMC 1.2.2.2. Boot from QSPI 1.2.2.3. Boot from NAND 1.2.2.4. Boot from FPGA 1.2.2.5. FPGA Fallback Boot 1.2.2.6. Boot from RAM on Warm Reset
1.3. Boot Duration x
1.3.1. Optimizing Boot Duration 1.3.2. Boot Duration Measurements
1.3.1. Optimizing Boot Duration x
1.3.1.1. Hardware Powerup Sequence 1.3.1.2. Boot ROM 1.3.1.3. Preloader 1.3.1.4. Bootloader 1.3.1.5. Linux Kernel 1.3.1.6. Init Scripts
1.4. Boot Debugging x
1.4.1. Boot ROM 1.4.2. Preloader 1.4.3. U-Boot
1.4.2. Preloader x
1.4.2.1. Debugging the Preloader from ARM DS-5 AE
1.5. Boot Examples x
1.5.1. Bare-Metal Application 1.5.2. Booting from SD/MMC – Custom Partition 1.5.3. Booting from SD/MMC – FAT Partition 1.5.4. Booting from QSPI Flash 1.5.5. Booting from FPGA
1.5.5. Booting from FPGA x
1.5.5.1. Overview 1.5.5.2. Hardware Design 1.5.5.3. Building and Running the Example
1. AN 709: HPS SoC Boot Guide - Cyclone V SoC Development Kit

1.3.2. Boot Duration Measurements

This section presents various Boot time measurements taken on the Cyclone V Development Kit. Only Boot ROM and Preloader are measured.

The measurements are done with the following setup:

  • SoC EDS 14.1b182: for GHRD & Preloader
  • Cyclone V Development Kit rev D
  • Kingston 4GB Class 10 SD card
  • 512 MB Micron QSPI
  • Preloader size = 38,548 bytes
  • U-boot size = 238,316 bytes
Note: All durations are in milliseconds.
Table 2.  Boot ROM Duration for CSEL OptionsThis table presents the Boot ROM duration for different CSEL options, for both SD/MMC and QSPI.
Source CSEL=00 CSEL=01 CSEL=10 CSEL=11
SD/MMC 168.86 N/A 72.43 103.06
QSPI 110.44 28.09 24.56 13.9
Table 3.  SD/MMC and QSPI Preloader Duration This table presents the standard Preloader duration, for both SD/MMC and QSPI.
Source CSEL=00 CSEL=01 CSEL=10 CSEL=11
SD/MMC 142.88 N/A 136.67 137.17
QSPI 136.4 130.94 130.84 130.27
Note: The CSEL also influences the Preloader duration, but less than Boot ROM.
Table 4.  Preloader Duration after Removing Serial Support This table presents the Preloader duration after the serial support was removed:
Source CSEL=00 CSEL=01 CSEL=10 CSEL=11
SD/MMC 93.58 N/A 87.26 87.81
QSPI 79.08 73.27 73.08 72.53
Table 5.  Preloader Duration after Removing Serial Support and the CRCThis table presents the Preloader durations after removing both the serial support and the CRC of the next boot stage.
Source CSEL=00 CSEL=01 CSEL=10 CSEL=11
SD/MMC 71.25 N/A 65.04 65.48
QSPI 56.44 50.61 50.82 50.25
Table 6.  Boot ROM and Preloader Durations when Using SD/MMC with a FAT PartitionThis table presents the durations of Boot ROM and Preloader when using SD/MMC with a FAT partition for the next boot stage.
Note: The new Preloader size is 42,268 bytes.
Source CSEL=00 CSEL=01 CSEL=10 CSEL=11
BootROM 183.85 N/A 78.23 113.80
Preloader: SD + FAT 78.56 N/A 75.65 75.93
Note: The serial support and the CRC for the next image area also removed.
Table 7.  Duration of FPGA ProgrammingThis table presents the duration of FPGA programming, when performed from Preloader. The uncompressed FPGA image size is 7,007,248 bytes, while the compressed FPGA image size is 2,335,334 bytes.
FPGA Image Source Uncompressed Image Compressed Image
QSPI 1,374 473
SD-FAT 563 223
Table 8.  Duration of Two of the Optional Preloader Operations
Activity Duration
Hardware Diagnostic (Memory Test) 2,640
SDRAM Scrubbing (16 MB) 25
Level Two Title