Intel® Cyclone® 10 GX FPGA Development Kit User Guide

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ID 683696
Date 8/15/2018
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Development Kit Setup 4. Development Kit Components 5. Board Test System A. Additional Information B. Revision History
1. Overview x
1.1. General Development Kit Description 1.2. Recommended Operating Conditions 1.3. Handling the Board
2. Getting Started x
2.1. Installing the Quartus Prime Software 2.2. Development Kit Package 2.3. Installing the Intel® FPGA Download Cable Driver
3. Development Kit Setup x
3.1. Setting up the Development Kit 3.2. Default Switch and Jumper Settings
4. Development Kit Components x
4.1. Board Overview 4.2. Cyclone 10 GX FPGA 4.3. MAX 10 System Controller 4.4. FPGA Configuration 4.5. Status and User I/O Elements 4.6. Clocks 4.7. Memory 4.8. Power 4.9. Transceivers Interfaces and Communication Ports
4.5. Status and User I/O Elements x
4.5.1. Switches 4.5.2. Pushbuttons 4.5.3. LEDs
4.7. Memory x
4.7.1. EMIF with DDR3 4.7.2. QSPI Flash
4.9. Transceivers Interfaces and Communication Ports x
4.9.1. Transceiver Channels 4.9.2. PCIe Interface 4.9.3. SFP+ Interface 4.9.4. USB3.1 Type-C Interface 4.9.5. FPGA Mezzanine Card (FMC) Interface 4.9.6. 10/100/1000Base-T Ethernet Connector 4.9.7. I2C/PMBUS
5. Board Test System x
5.1. Preparing the Board 5.2. Running the Board Test System 5.3. Using the Board Test System
5.3. Using the Board Test System x
5.3.1. The Configure Menu 5.3.2. The System Info Tab 5.3.3. The GPIO Tab 5.3.4. The EPCQ Tab 5.3.5. The XCVR Tab 5.3.6. The FMC Tab 5.3.7. The DDR3 Tab 5.3.8. Power Monitor 5.3.9. Clock Controller
A. Additional Information x
A.1. Safety and Regulatory Information A.2. Compliance and Conformity Statements
A.1. Safety and Regulatory Information x
A.1.1. Safety Warnings A.1.2. Safety Cautions
B. Revision History x
B.1. Document Revision History for Intel® Cyclone® 10 GX FPGA Development Kit User Guide
1. Overview
2. Getting Started
3. Development Kit Setup
4. Development Kit Components
5. Board Test System
A. Additional Information
B. Revision History

4.1. Board Overview

Figure 2.  Intel® Cyclone® 10 GX FPGA Developement Kit Block Diagram
There are four sub-systems in this development kit:
  • Intel® Cyclone® 10 GX FPGA and its peripherals
  • Configuration with Intel® MAX® 10 FPGA
  • Timing
  • Power Supply
Table 3.  Board Components Table
Board Reference Type Description
Featured Devices
U1 FPGA Intel® Cyclone® 10 GX FPGA 10CX220YF780E5G, 220K Logic Elements, 12 Transceivers, F780 BGA package
U2 FPGA Intel® MAX® 10 10M08SAU169C8G for On-board Intel® FPGA Download Cable II and Power Management
U3 FPGA Intel® MAX® 10 10M08SAU169C8G for PFL configuration, clock generator control and power monitoring
U49 Voltage Regulator Intel® Enpirion® EM2130L-30A Step-Down DC-DC Switching Converter with Integrated Inductor, featuring Digital Control with PMBus™ v1.2 Compliant Interface, implements FPGA 0.9V Vcc
U50 Voltage Regulator Intel® Enpirion® EM2130H – 30A Step-Down DC-DC Switching Converter with Integrated Inductor, Featuring Digital Control with PMBus™ v1.2 Compliant Interface, implements 3.3V intermediate power bus used by other lower voltage power rails
U51 Voltage Regulator

Intel® Enpirion® ER2120QI - 2A Synchronous Buck

Regulator with Integrated MOSFETs, implements 5V USB VBUS of USB3.1 Type-C interface

U52 Voltage Regulator

Intel® Enpirion® ER3105DI - 500mA Wide VIN

Synchronous Buck Regulator, implements local power supply used by U49 and U50.

U53, U54, U55, U60 Voltage Regulator Intel® Enpirion® EN6337QI - 3A PowerSoC Voltage Mode Synchronous PWM Buck with Integrated Inductor, implements 1.03V, 1.5V, and 1.8V power rails to FPGA
U56 Voltage Regulator Intel® Enpirion® EN6347QI - 4A PowerSoC Voltage Mode Synchronous PWM Buck with Integrated Inductor, implements voltage adjustable power rail to FPGA and FMC daughter card
U62 Voltage Regulator

Intel® Enpirion® ER3110DI - 1A Wide VIN

Synchronous Buck Regulator, implements power supply used by U2 and U3.

Configuration and Setup Elements
J9 Embedded Intel® FPGA Download Cable II Type-B Micro USB Connector for programming and debugging the FPGA
J11 10-pin header Optional JTAG direct via 10-pin header for external download cables
S1

DIP-SW:

ON/Closed/0

OFF/Open/1

Intel® Cyclone® 10 GX FPGA Configuration Mode

S7 FPGA PGM_SEL Push Button Press this button to cycle through different PFL loads
S12 FPGA nCONFIG Push Button Press this button to trigger reconfiguration
S13 FPGA Reset Push Button Press this button to reset all registers in the FPGA
Status Elements
D23 Power LED (Green)

Power Good LED (All power rails are OK)

ON: Detected Power is Good

OFF: Detected Power is Bad
D13 Configuration Error LED (Red)

Config error status Indicator

ON: FPGA configuration failed

OFF: FPGA configured without error
D14 Load LED (Green)

Config is loading

ON: FPGA configuration is going on

OFF: FPGA configuration has finished
D15 Configuration LED (Green)

Config done status Indicator

ON: FPGA configured successfully

OFF: FPGA not configured
General User Input/Output
S8, S10, S11 General user push buttons Three user push buttons. Driven low when pressed.
D19, D20, D21, D22 User LEDs Four user LEDs. Illuminates when driven low.
S9, S15 User DIP Switches 4-bit user DIP switches, low when set to ON
Clocks
U11 50 MHz Oscillator 50 MHz crystal oscillator for logic of two Intel® MAX® 10 FPGA devices, 3.3V LVCMOS
Y4 50 MHz Oscillator 50 MHz crystal oscillator for general purpose logic of Intel® Cyclone® 10 GX FPGA, 1.8V LVCMOS
Y1 100 MHz Oscillator 100 MHz crystal oscillator for calibration and configuration of Intel® Cyclone® 10 GX FPGA, 1.8V LVCMOS
Y2 Programmable Oscillator Programmable Oscillator for Intel® Cyclone® 10 GX FPGA Transceivers, LVDS
U7 Clock Buffer 2:1 buffer for reference clock
U64 Programmable clock generator Eight channel Programmable clock generator. 4 outputs are implemented, default frequencies are 125 MHz, 21.186 MHz, 125 MHz and 100 MHz
Transceiver Interfaces
U16 PCIe* x4 Golden Finger PCIe* Gen2 x4 endpoint
J5, J6 SFP+ Support 10 GE SFP+ module
J7 FMC 5 Transceivers up to 12.5Gbps
J8 USB Type-C Implements USB3.1 and USB2.0
U26 USB 2:1 MUX TI HD3SS3220 USB Type-C DRP Port Controller with SuperSpeed 2:1 MUX
U65 USB Redriver TI USB1002 USB3.1 10 Gbps Dual-Channel Linear Redriver
Memory
U12, U13, U14 DDR3 memory ISSI IS43TR16256A-107MBLI 256Mx16 4Gb DDR3 SDRAM
U4 EPCQ-L Flash EPCQ-L 1024
U58 QSPI Flash ISSI IS25WP256D-RHLE, 256Mbit
Power
J12 PCIe* ATX 2x4 Auxiliary power supply of PCIe* system
J13 DC-input 4-pin DIN power adaptor
S14 Power Switch Slide switch for power input
Level Two Title