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A.1. Modify the Intel® Stratix® 10 SX SoC Development Kit to use a battery for the BBRAM
A.2. Modify the Intel® Stratix® 10 SX SoC Development Kit HPS DDR4 memory width and ECC configuration using the Golden Hardware Reference Design project
A.3. Safety and Regulatory Information
A.4. Compliance Information
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5.3.1. The Configure Menu
Use Configure Menu to select the design you want to use. Each design example tests different board features. Select a design from this menu and the corresponding tabs become active for testing.
Figure 33. The Configure Menu
To configure the FPGA with a test system design, perform the following steps:
- On the Configure menu, click the configure command that corresponds to the functionality you wish to test.
- In the dialog box that appears, click Configure to download the corresponding design to the FPGA.
Figure 34. Programmer Dialog Window