Early Power Estimator for Intel® Stratix® 10 FPGAs User Guide

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ID 683175
Date 12/03/2021
Public
Document Table of Contents
Document Table of Contents x
1. Overview of the Early Power Estimator for Intel® Stratix® 10 Devices 2. Setting Up the Early Power Estimator for Intel® Stratix® 10 Devices 3. Early Power Estimator for Intel® Stratix® 10 Graphical User Interface 4. Early Power Estimator Worksheets for Intel® Stratix® 10 Devices 5. Factors Affecting the Accuracy of the Early Power Estimator 6. Document Revision History for Early Power Estimator for Intel® Stratix® 10 FPGAs User Guide A. Measuring Static Power
1. Overview of the Early Power Estimator for Intel® Stratix® 10 Devices x
1.1. Intel® Stratix® 10 EPE Power Model Status 1.2. Definitions of Power Terms Used in this Document
2. Setting Up the Early Power Estimator for Intel® Stratix® 10 Devices x
2.1. System Requirements 2.2. Download and Install the Early Power Estimator for Intel® Stratix® 10 Devices 2.3. Estimating Power Consumption with the Intel® Stratix® 10 Early Power Estimator
2.2. Download and Install the Early Power Estimator for Intel® Stratix® 10 Devices x
2.2.1. Changing the Macro Security Level in Microsoft Excel* 2003 2.2.2. Changing the Macro Security Level in Microsoft Excel* 2007 2.2.3. Changing the Macro Security Level in Microsoft Excel* 2010
2.3. Estimating Power Consumption with the Intel® Stratix® 10 Early Power Estimator x
2.3.1. Estimating Power Consumption Before Starting the FPGA Design 2.3.2. Estimating Power Consumption While Creating the FPGA Design 2.3.3. Estimating Power Consumption After Completing the FPGA Design
3. Early Power Estimator for Intel® Stratix® 10 Graphical User Interface x
3.1. Intel® Stratix® 10 EPE Input Fields 3.2. Intel® Stratix® 10 EPE Output Fields 3.3. Intel® Stratix® 10 EPE Input/Output Fields 3.4. Intel® Stratix® 10 EPE Field Shading 3.5. Intel® Stratix® 10 EPE Input Field Dependencies 3.6. Intel® Stratix® 10 EPE Buttons
4. Early Power Estimator Worksheets for Intel® Stratix® 10 Devices x
4.1. Intel® Stratix® 10 EPE - Common Worksheet Elements 4.2. Intel® Stratix® 10 EPE - Main Worksheet 4.3. Intel® Stratix® 10 EPE - Logic Worksheet 4.4. Intel® Stratix® 10 EPE - RAM Worksheet 4.5. Intel® Stratix® 10 EPE - DSP Worksheet 4.6. Intel® Stratix® 10 EPE - Clock Worksheet 4.7. Intel® Stratix® 10 EPE - PLL Worksheet 4.8. Intel® Stratix® 10 EPE - I/O Worksheet 4.9. Intel® Stratix® 10 EPE - I/O-IP Worksheet 4.10. Intel® Stratix® 10 EPE - XCVR Worksheet 4.11. Intel® Stratix® 10 EPE - HPS Worksheet 4.12. Intel® Stratix® 10 EPE - HBM Worksheet 4.13. Intel® Stratix® 10 EPE - Thermal Worksheet 4.14. Intel® Stratix® 10 EPE - Report Worksheet 4.15. Intel® Stratix® 10 EPE - Intel® Enpirion® Worksheet
5. Factors Affecting the Accuracy of the Early Power Estimator x
5.1. Toggle Rate 5.2. Temperature
1. Overview of the Early Power Estimator for Intel® Stratix® 10 Devices
2. Setting Up the Early Power Estimator for Intel® Stratix® 10 Devices
3. Early Power Estimator for Intel® Stratix® 10 Graphical User Interface
4. Early Power Estimator Worksheets for Intel® Stratix® 10 Devices
5. Factors Affecting the Accuracy of the Early Power Estimator
6. Document Revision History for Early Power Estimator for Intel® Stratix® 10 FPGAs User Guide
A. Measuring Static Power

1.1. Intel® Stratix® 10 EPE Power Model Status

The power models in the Early Power Estimator (EPE) for Intel® Stratix® 10 devices can be in advance, preliminary, or final status.

Advance power models are based on simulation results, process model projections, and design targets. Preliminary power models include post-layout simulation results, process data, and initial silicon correlation results. Advance and preliminary power models may change over time. Final power models correlate to production devices with thousands of designs, and are not expected to change. The Main worksheet of the EPE spreadsheet shows power model status for the selected device.

The accuracy of the power model is determined on a per-power-rail basis for both the Power Analyzer and the Early Power Estimator. For most designs, the Power Analyzer and the EPE spreadsheet have the following accuracies, with final power models:
  • Power Analyzer: Within 10% of silicon for the majority of power rails and the highest power rails, assuming accurate inputs and toggle rates.
  • EPE spreadsheet: Within 15% of silicon for the majority of power rails and the highest power rails, assuming accurate inputs and toggle rates. Recommended margins are shown in the report tab (see Report tab section).

See Section 5 for information on factors impacting power estimation accuracy.

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