External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Public
Document Table of Contents

6.3. Signal Descriptions

The following tables lists the signals of the controller’s Avalon® -MM slave interface.

Table 64.   Avalon® -MM Slave Read Signals

UniPHY Signal Name

Width

Direction

Avalon® -MM Signal Type

avl_r_ready

1

Out

waitrequest_n
avl_r_read_req

1

In

read
avl_r_addr

 15–25

In

address
avl_r_rdata_valid

1

Out

readdatavalid
avl_r_rdata

9, 18, 36 (or 8, 16, 32 if power-of-2-bus is enabled in the controller)

Out

readdata
avl_r_size

log_2(MAX_BURST_SIZE) + 1

In

burstcount
Note: To obtain the actual signal width, you must multiply the widths in the above table by the data width ratio and the width expansion ratio.
Table 65.   Avalon® -MM Slave Write Signals

UniPHY Signal Name

Width

Direction

Avalon® -MM Signal Type

avl_w_ready

1

Out

waitrequest_n
avl_w_write_req

1

In

write
avl_w_addr

 15–25

In

address
avl_w_wdata

9, 18, 36 (or 8, 16, 32 if power-of-2-bus is enabled in the controller)

In

writedata
avl_w_be

1,2,4

In

byteenable
avl_w_size

log_2(MAX_BURST_SIZE) + 1

In

burstcount
Note: To obtain the actual signal width, you must multiply the widths in the above table by the data width ratio and the width expansion ratio.