Intel® Stratix® 10 Configuration User Guide

ID 683762
Date 10/21/2022
Public

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5.4.1.3. RSU Image Layout – Your Perspective

The sub-partition table (SPT) is used for managing the allocation of the quad SPI flash.

The Intel® Quartus® Prime Programming File Generator creates the SPT when creating the initial RSU image. To ensure reliable operation, the Programming File Generator creates two copies of the sub-partition table (SPT0 and SPT1) and the configuration pointer block (CPB0 and CPB1).

The initial RSU image stored in flash typically contains the following partitions:

Table 42.  Typical Sub-Partitions of the RSU Image
Sub-partition Name Contents
BOOT_INFO Decision firmware and decision firmware data
FACTORY_IMAGE Factory Image
SPT0 Sub-partition table 0
SPT1 Sub-partition table 1
CPB0 Pointer block 0
CPB1 Pointer block 1
P1 Application image 1
P2 Application image 2
Figure 70. RSU Image Layout - Your PerspectiveIn this figure:
  • SPT0 and SPT1 point to everything:
    • BOOT_INFO
    • Factory Image
    • Pointer Block 0 and Pointer Block 1
    • All Application Images
  • Pointer Block 0 and Pointer Block 1 point to all Application Images
Note: When the PUF feature is used, two more 32 K blocks are required for storing PUF data. For more information about PUF and the detailed flash layout, refer to the Intel® Stratix® 10 Device Security User Guide.
To summarize, your view of flash memory is different from SDM view in two ways:
  • You do not need to know the addresses of the decision firmware, decision firmware data, and factory image.
  • You have access to the sub-partition tables. The sub-partition tables provide access to the data structures required for remote system update.