Early Power Estimator for Intel® Cyclone® 10 LP FPGAs User Guide

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ID 683743
Date 5/08/2017
Public
Document Table of Contents
Document Table of Contents x
1. Overview of the Early Power Estimator for Intel® Cyclone® 10 LP 2. Setting Up the Early Power Estimator for Intel® Cyclone® 10 LP 3. Early Power Estimator Worksheets for Intel® Cyclone® 10 LP 4. Factors Affecting the Accuracy of the Early Power Estimator for Intel® Cyclone® 10 LP
1. Overview of the Early Power Estimator for Intel® Cyclone® 10 LP x
1.1. Power Model Status 1.2. Document Revision History
2. Setting Up the Early Power Estimator for Intel® Cyclone® 10 LP x
2.1. System Requirements 2.2. Download and Install the Early Power Estimator 2.3. Estimating Power Consumption 2.4. Document Revision History
2.2. Download and Install the Early Power Estimator x
2.2.1. Changing the Macro Security Level in Microsoft Excel* 2003 2.2.2. Changing the Macro Security Level in Microsoft Excel* 2007 2.2.3. Changing the Macro Security Level in Microsoft Excel* 2010
2.3. Estimating Power Consumption x
2.3.1. Estimating Power Consumption Before Starting the FPGA Design 2.3.2. Estimating Power Consumption While Creating the FPGA Design 2.3.3. Estimating Power Consumption After Completing the FPGA Design
2.3.1. Estimating Power Consumption Before Starting the FPGA Design x
2.3.1.1. Entering Information into the Early Power Estimator 2.3.1.2. Manually Entering Values
2.3.2. Estimating Power Consumption While Creating the FPGA Design x
2.3.2.1. Importing a File 2.3.2.2. Generating the Early Power Estimator (EPE) File 2.3.2.3. Importing Data into the Early Power Estimator (EPE) Spreadsheet
3. Early Power Estimator Worksheets for Intel® Cyclone® 10 LP x
3.1. Cyclone® 10 LP EPE - Main Worksheet 3.2. Cyclone® 10 LP EPE - Logic Worksheet 3.3. Cyclone® 10 LP EPE - RAM Worksheet 3.4. Cyclone® 10 LP EPE - DSP Worksheet 3.5. Cyclone® 10 LP EPE - I/O Worksheet 3.6. Cyclone® 10 LP EPE - PLL Worksheet 3.7. Cyclone® 10 LP EPE - Clock Worksheet 3.8. Cyclone® 10 LP EPE - Report Worksheet 3.9. Cyclone® 10 LP EPE - Enpirion Worksheet 3.10. Document Revision History
3.1. Cyclone® 10 LP EPE - Main Worksheet x
3.1.1. Input Parameters 3.1.2. Thermal Power 3.1.3. Power Tree Design 3.1.4. Thermal Analysis
3.1.4. Thermal Analysis x
3.1.4.1. Not Using a Heat Sink 3.1.4.2. Using a Heat Sink
3.8. Cyclone® 10 LP EPE - Report Worksheet x
3.8.1. Static Power and Dynamic Current per Voltage Rail 3.8.2. Power Up Current 3.8.3. Power Breakout for Multiple Voltage Supplies 3.8.4. Power Regulator Settings
4. Factors Affecting the Accuracy of the Early Power Estimator for Intel® Cyclone® 10 LP x
4.1. Toggle Rate 4.2. Airflow 4.3. Temperature 4.4. Heat Sink 4.5. Document Revision History
1. Overview of the Early Power Estimator for Intel® Cyclone® 10 LP
2. Setting Up the Early Power Estimator for Intel® Cyclone® 10 LP
3. Early Power Estimator Worksheets for Intel® Cyclone® 10 LP
4. Factors Affecting the Accuracy of the Early Power Estimator for Intel® Cyclone® 10 LP

3.1.4.2. Using a Heat Sink

When your device employs a heat sink, the major paths of power dissipation are from the device through the case, thermal interface material, and heat sink. There is also a path of power dissipation through the board. The path through the board has less impact than the path to air.
Figure 9. Thermal Representation with a Heat Sink

In the model used in the Early Power Estimator (EPE) spreadsheet, power is dissipated through the board or through the case and heat sink. The junction-to-board thermal resistance (θJA BOTTOM) refers to the thermal resistance of the path through the board. Junction-to-ambient thermal resistance (θJA TOP) refers to the thermal resistance of the path through the case, thermal interface material, and heat sink.

Figure 10. Thermal Model for the EPE Spreadsheet with a Heat Sink

If you want the EPE spreadsheet thermal model to take the θJA BOTTOM into consideration, set the Board Thermal Model parameter to JEDEC (2s2p). Otherwise, set the Board Thermal Model parameter to None (conservative). In this case, the path through the board is not considered for power dissipation and a more conservative thermal power estimate is obtained.

The addition of the junction-to-case thermal resistance (θJC), the case-to-heat sink thermal resistance (θCS) and the heat sink-to-ambient thermal resistance (θSA) determines the θJA TOP.

Figure 11. Junction-to-Ambient Thermal Resistance

Based on the device, package, airflow, and heat sink solution selected in the Input Parameters section, the EPE spreadsheet determines the θJA TOP.

If you use a low, medium, or high profile heat sink, select the airflow from the values of Still Air and air flow rates of 100 lfm (0.5 m/s), 200 lfm (1.0 m/s), and 400 lfm (2.0 m/s). If you use a custom heat sink, enter the custom θSA value. You must incorporate the airflow into the custom θSA value. Therefore, the Airflow parameter is not applicable in this case. You can obtain these values from the heat sink manufacturer.

The ambient temperature does not change, but the junction temperature changes depending on the thermal properties. Because a change in junction temperature affects the thermal device properties that are used to calculate junction temperature, calculating the junction temperature is an iterative process.

The total power is calculated based on the total θJA value, ambient, and junction temperatures with the following equation.

Figure 12. Total Power

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