Differences Among Intel SoC Device Families

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ID 683648
Date 8/22/2018
Public
Document Table of Contents
Document Table of Contents x
Differences Among Intel SoC Device Families
Differences Among Intel SoC Device Families x
Overview of HPS Modules HPS MPU Subsystem Differences Stratix 10 HPS Interface to SDM Booting and Configuration Differences HPS Cache Coherency Controller Differences HPS System Memory Management Differences HPS On-Chip RAM Differences HPS Error Correction Differences HPS DMA Controller Differences HPS Clock Manager Differences HPS Reset Manager Differences HPS FPGA Manager Differences HPS System Manager Differences HPS Scan Manager Differences HPS Security Feature Differences HPS Interconnect Differences HPS-FPGA Bridge Differences HPS General Purpose I/O Interface Differences HPS I/O Configuration Differences HPS SDRAM Controller Subsystem Differences HPS NAND Flash Controller Differences HPS SD/MMC Controller Differences HPS Quad SPI Flash Controller Differences HPS USB 2.0 OTG Controller Differences HPS EMAC Differences HPS SPI Controller Differences HPS I2C Controller Differences HPS UART Controller Differences HPS CAN Controller Differences HPS Timer Differences HPS Watchdog Timer Differences HPS CoreSight Debug and Trace Differences Document Revision History
Differences Among Intel SoC Device Families

Overview of HPS Modules

Table 1.  Summary: Differences Among HPS Modules
HPS Module Cyclone V SoC Arria V SoC Arria 10 SoC Stratix 10 SoC
Microprocessor Unit Subsystem (MPU) Single / Dual Cortex®-A9 Dual Cortex-A9 Dual Cortex-A9 Quad Cortex-A53
Cache Coherency Controller Accelerator coherency port (ACP) ACP ACP Cache Coherency Unit (CCU)
System Memory Management Unit No No No Yes
On-Chip RAM 64 KB 64 KB 256 KB 256 KB
Error Correction Code (ECC) Controller No No Yes Yes
DMA Controller Yes Yes Yes Yes
Clock Manager Yes Yes Yes Yes
Reset Manager Yes Yes Yes Yes
FPGA Manager Yes Yes Yes No
System Manager Yes Yes Yes Yes
Scan Manager Yes Yes No No
Security Manager No No Yes No (SDM)
System Interconnect Yes Yes Yes Yes
HPS-FPGA Bridges Yes Yes Yes Yes
General Purpose I/O (GPIO) Yes Yes Yes Yes
Available dedicated I/Os 10 10 17 48
Available shared I/Os Up to 67 94 48 0
SDRAM Controller Inside HPS Inside HPS Outside of HPS Outside of HPS
NAND Flash Controller Yes Yes Yes Yes
Secure digital/multimedia card (SD/MMC) Controller Yes Yes Yes Yes
Quad SPI (QSPI) Flash Controller Yes Yes Yes No1
USB 2.0 On-the-Go (OTG) 2 2 2 2
Ethernet Media Access Control (MAC) 2 2 3 3
SPI Master Controller 2 2 2 2
SPI Slave Controller 2 2 2 2
Inter-Integrated Circuit (I2C) Controller 2 2 5 5
UART Controller 2 2 2 2
Controller Area Network (CAN) Controller 2 0 0 0
Timer 4 4 4 4
Watchdog Timer 2 2 2 4
CoreSight Debug and Trace Yes Yes Yes Yes
Secure Device Manager (SDM) Interface No No No Yes
1 The SDM supports QSPI
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