Cyclone® V Device Handbook: Volume 1: Device Interfaces and Integration

ID 683375
Date 10/18/2023
Public
Document Table of Contents

5.13.4. Differential I/O Termination for Cyclone® V Devices

The Cyclone® V devices provide a 100 Ω, on-chip differential termination option on each differential receiver channel for LVDS standards. On-chip termination saves board space by eliminating the need to add external resistors on the board. You can enable on-chip termination in the Intel® Quartus® Prime software Assignment Editor.

All I/O pins and dedicated clock input pins support on-chip differential termination, RD OCT.

Figure 114. On-Chip Differential I/O Termination


Table 66.   Intel® Quartus® Prime Software Assignment Editor—On-Chip Differential TerminationThis table lists the assignment name for on-chip differential termination in the Intel® Quartus® Prime software Assignment Editor.
Field Assignment
To rx_in
Assignment name Input Termination
Value Differential