DisplayPort Intel® FPGA IP User Guide

ID 683273
Date 9/02/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

11.6.14. DPRX0_MSA_MISC1

Address: 0x002d

Direction: RO

Reset: 0x00000000

Table 180.  DPRX0_MSA_MISC1 Bits

Bit

Bit Name

Function

31:8

Unused

7:0

MISC1

Main stream attribute MISC1 (refer to the VESA DisplayPort Standard)