Intel® FPGA SDK for OpenCL™ Pro Edition: Programming Guide

ID 683846
Date 12/19/2022
Public
Document Table of Contents

7.22. Speeding Up Your OpenCL Compilation (-fast-compile)

To save 40-90% of compilation time and quickly create the .aocx file of your kernel, include the -fast-compile Intel® FPGA SDK for OpenCL™ Offline Compiler command option in your aoc command.

Intel® recommends that you use the -fast-compile option for internal development only.

The -fast-compile feature achieves significant savings in compilation time by lowering optimization efforts.

At the command prompt, invoke the aoc -rtl <your_kernel_filename1>.cl -fast-compile command.

Warning:
  • Enabling the -fast-compile feature might cause some performance issues such as:
    • Higher resource use
    • Lower fmax and as a result lower application performance
    • Lower power efficiency
  • When compiling your kernel using the -fast-compile flag, you might see functional failures due to timing violations in your design. In such cases, either avoid using the -fast-compile flag or try compiling your kernel with different seeds.
Attention:
  • You can only use the -fast-compile compiler option to compile OpenCL designs targeting Intel® Arria® 10 and newer devices.
  • After you finalize a design, compile your OpenCL* kernel without the -fast-compile option over multiple seeds to obtain the best performance.
  • Regardless of whether the -fast-compile feature is enabled, the initial compilation of any OpenCL system on a new board and with a new version of Intel® FPGA SDK for OpenCL™ Pro Edition takes an additional 45 to 60 minutes to complete. The additional time is used to cache some parts of the compilation for future compilations (this behavior does not affect kernel performance). To create this cache, define the environment variable $AOCL_TMP_DIR to a writable directory that you can share. By default, this cache is stored in /var/tmp/aocl/$USER on Linux and %USERPROFILE%\AppData\Local\aocl on Windows. You can share this writable directory by setting it to a shared network location.

    After you create the cache, you do not need to create it again for the current version of the Intel® FPGA SDK for OpenCL™ and the current targeted board.