Intel® Quartus® Prime Pro Edition User Guide: Design Compilation

ID 683236
Date 12/04/2023
Public

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2.9.2.1. Locate Critical Chains

The Retiming Limit Details report shows the design paths that limit further register retiming. Right-click any path to locate the path in the Technology Map Viewer - Post-fitting view. This viewer displays a schematic representation of the complete design after place, route, and register retiming. To view the retimed netlist in the Technology Map Viewer, follow these steps:
  1. To open the Retiming Limit Details report, click the Report icon next to the Retime stage in the Compilation Dashboard.
  2. Right-click any path in the Retiming Limit Details report and click Locate Critical Chain in Technology Map Viewer. The netlist displays as a schematic in the Technology Map Viewer.
    Figure 107. Technology Map Viewer
    Figure 108. Post-Fit Viewer After RetimingIn the post-fit viewer, bypassed ALM registers are gray. Hyper-Registers are pink with the word "HYPER" below them. Used ALMs are pink without the word "HYPER" below them