Article ID: 000086027 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Does the ALT_LVDS MegaFunction utilize the gated lock circuitry for the PLL that is instantiated?

Environment

  • PLL
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description The ALT_LVDS MegaFunction does not instantiate the gated lock circuitry automatically.  To use the gated lock circuitry, you must use the external PLL mode of the MegaFunction.

    Related Products

    This article applies to 5 products

    Stratix® FPGAs
    Stratix® GX FPGA
    Stratix® II GX FPGA
    Stratix® II FPGAs
    Stratix® III FPGAs

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