Article ID: 000080847 Content Type: Troubleshooting Last Reviewed: 11/06/2019

Why does the DisplayPort Intel® FPGA IP Windows* design example generation fail when simulation check box is enabled?

Environment

  • Intel® Quartus® Prime Pro Edition
  • DisplayPort Intel® FPGA IP
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition software versions 19.1 and 19.2, the DisplayPort Intel® FPGA IP Windows* design example generation fails when "simulation" check box is enabled.    

    Resolution

    This problem is fixed starting in the Intel® Quartus® Prime Pro Edition version 19.3 software.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs

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