Article ID: 000079284 Content Type: Troubleshooting Last Reviewed: 04/18/2023

Why does my NCSim Gen3 PIPE simulation fail to compile for Intel® Arria® 10 FPGAs?

Environment

  • Quartus® II Subscription Edition
  • PCI Express
  • Simulation
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    When using Quartus® II software release 14.0a10, the Hard IP for PCI Express does not compile under Cadence NCSim in PIPE mode.  This problem is due to a timescale directive discrepancy with the simulator.

    Resolution

    Use serial mode simulation as described in the user guide.

    This problem will be fixed in a future release of the Quartus development software.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 GX FPGA