Article ID: 000078044 Content Type: Troubleshooting Last Reviewed: 08/18/2023

When using ALTASMI_PARALLEL in Cyclone® III or Cyclone® IV devices, the Quartus® II software enforces a 2.5V I/O constraint on the Active Serial (AS) interface I/O, is there a way to override this?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

When using ALTASMI_PARALLEL in Cyclone® III or Cyclone IV devices, the Quartus® II software enforces a 2.5V I/O constraint on the AS interface I/O pins, so you may get a fitter error if this does not match the VCCIO setting for the bank that contains the AS pins in your design.

Resolution

There are two possible workarounds:

Workaround 1 

Go to the Assignments menu and select Device

Click on the Device and Pin options

Click on Voltage under the Category selection

Change the default from 2.5V to the voltage of the bank that contains the AS signals. (Note this setting will apply to any I/O you have which does not already have an I/O standard assignment).

Workaround 2

Make I/O standard assignments to all the pins that are mentioned in the error message, so that they meet your design VCCIO requirements for the bank that contains the AS pins.

An example is shown below.

set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to "top_altasmi_parallel_l852:top_altasmi_parallel_l852_component|cycloneii_asmiblock2~ALTERA_DCLK"

Related Products

This article applies to 4 products

Cyclone® III LS FPGA
Cyclone® III FPGAs
Cyclone® IV E FPGA
Cyclone® IV GX FPGA