Article ID: 000078006 Content Type: Product Information & Documentation Last Reviewed: 08/27/2013

How do I preserve the PLL output counter order or prevent PLL output counter merging for Stratix V, Arria V, and Cyclone V devices in the Quartus II software version 12.0 SP2 and earlier?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description The Preserve PLL Counter Order assignment is not supported in the Quartus® II software version 12.0 SP2 and earlier versions for Stratix® V, Arria® V, and Cyclone® V devices.
    Resolution

    You can use the PLLOUTPUTCOUNTER location constraint to prevent the PLL output counter from rotating to a different PLL output location or auto merging during compilation.

    Here is an example of a PLL counter location constraint in the .qsf file:

    set_location_assignment PLLOUTPUTCOUNTER_X98_Y113_N1 -to "pll0:inst|pll0_0002:pll0_inst|altera_pll:altera_pll_i|outclk[0]"

    set_location_assignment PLLOUTPUTCOUNTER_X98_Y115_N1 -to "pll0:inst|pll0_0002:pll0_inst|altera_pll:altera_pll_i|outclk[1]"

    set_location_assignment PLLOUTPUTCOUNTER_X98_Y114_N1 -to "pll0:inst|pll0_0002:pll0_inst|altera_pll:altera_pll_i|outclk[2]"

    Note, the Quartus II software will place the PLL output counters to ensure optimal routability of the design.  You may encounter fitter errors if you place the counters in locations that cannot support the required fanout.  In order to use the optimal counter placement, you should first compile the project and view the PLL Usage Summary report to obtain the PLL counter locations.  To prevent the counters from being auto merged, give each counter a unique phase shift. Once you apply the counter location assignments, you can then restore the desired phase shifts in the Altera PLL megafunction.

    A feature to prevent auto rotating and auto merging of PLL counters has been implemented in the Quartus II software version 12.1..

    Related Products

    This article applies to 14 products

    Cyclone® V ST SoC FPGA
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    Stratix® V GX FPGA
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    Cyclone® V GX FPGA
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    Cyclone® V SE SoC FPGA
    Cyclone® V E FPGA
    Stratix® V E FPGA