Article ID: 000076395 Content Type: Install & Setup Last Reviewed: 07/13/2023

Why does my design have timing violations when compiled in the Quartus® II software version 15.0?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Quartus® II software version 15.0 Update 1 and Update 2 for Windows, your design may fail timing if it meets the following conditions:

    1. The target device is a Stratix® V or Arria® V GZ
    2. The design implements transceivers

    The Quartus® II software version 15.0 Update 1 and Update 2 for Linux is not affected by this problem.

     

     

    Resolution

    To work around this problem, download and install the appropriate patch for your Quartus® II version from the links below. You must install the Quartus® II software version before installing the patch.

    This problem is fixed beginning with version 15.1 of the Quartus® Prime software.

      Related Products

      This article applies to 2 products

      Arria® V FPGAs and SoC FPGAs
      Stratix® V FPGAs