Article ID: 000075272 Content Type: Product Information & Documentation Last Reviewed: 01/29/2014

How do I set the Marvel 88E1111 Ethernet PHY on the Stratix IV E FPGA Development Kit to GMII mode?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

The hardware default setting of Stratix® IV E FPGA Development Kit is incorrectly set to Serial Gigabit Media Independent Interface (SGMII) mode. The Marvel 88E1111 Ethernet PHY interfaces the Stratix IV GX device with Gigabit Media Independent Interface (GMII), overwrite the 88E1111 interface settings using the Management Data I/O (MDIO) register of the PHY device.

Resolution

To set the 88E1111 to GMII interface mode, follow the procedure below.

Write 0xF to HWCFG_MODE (Register 27, bit[3:0])
Write 0x0 to RGMII Receive Timing Control (Register 20, bit[7])
Write 0x0 to RGMII Transmit Timing Control (Register 20, bit[1])
Write 0x1 to Reset (Register 0, bit[15] , Self-clearing bit)

Related Products

This article applies to 1 products

Stratix® IV E FPGA