Intel® eASIC™ devices are structured ASICs, an intermediary technology between FPGAs and standard-cell ASICs. These devices provide lower unit-cost and lower power compared to FPGAs and faster time to market and lower non-recurring engineering cost compared to standard-cell ASICs. The new Intel® eASIC™ N5X devices, formerly codenamed Diamond Mesa, add a hard processor system and secure device managers compatible with Intel® FPGAs to extend Intel's logic portfolio offerings.
- 16nm process
- Up to 88 million equivalent ASIC gates
- Up to 229Mb of true dual port memory and 20Mb of 128b register files
- Up to 80 32.44 Gbps high-speed transceivers
- Quad-core ARMv8 hard processor system
- Secure device manager for bring up, security, and anti-tamper features
- 28 nm process
- Up to 52 million equivalent ASIC gates
- Up to 124 MB of true dual port memory
- Up to 32 28 Gbps high-speed transceivers
- Up to 32 16.3 Gbps high-speed transceivers
Product and Performance Information
Performance varies by use, configuration and other factors. Learn more at www.Intel.sg/PerformanceIndex.
Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available security updates. See backup for configuration details. No product or component can be absolutely secure.
No product or component can be absolutely secure.
Your costs and results may vary.
Results have been estimated or simulated.
Statements in this document that refer to future plans or expectations are forward-looking statements. These statements are based on current expectations and involve many risks and uncertainties that could cause actual results to differ materially from those expressed or implied in such statements. For more information on the factors that could cause actual results to differ materially, see our most recent earnings release and SEC filings at www.intc.com.