Intel® eASIC™ devices are structured ASICs, an intermediary technology between FPGAs and standard-cell ASICs. These devices provide lower unit-cost and lower power compared to FPGAs and faster time to market and lower non-recurring engineering cost compared to standard-cell ASICs. The new Intel® eASIC™ N5X devices, formerly codenamed Diamond Mesa, add a hard processor system and secure device managers compatible with Intel® FPGAs to extend Intel's logic portfolio offerings.
Intel® eASIC™ N5X Devices
- 16nm process
- Up to 88 million equivalent ASIC gates
- Up to 229Mb of true dual port memory and 20Mb of 128b register files
- Up to 80 32.44 Gbps high-speed transceivers
- Quad-core ARMv8 hard processor system
- Secure device manager for bring up, security, and anti-tamper features
Intel® eASIC™ N3XS Devices
- 28 nm process
- Up to 52 million equivalent ASIC gates
- Up to 124 MB of true dual port memory
- Up to 32 28 Gbps high-speed transceivers
- Up to 32 16.3 Gbps high-speed transceivers
Intel® eASIC™ N3X and N2X Devices
- 28 nm and 45 nm process
- Up to 5 million equivalent logic gates
- Up to 15.049 kbits of true dual port memory
- Up to 18 12.5 Gbps high-speed transceivers
Intel® easicopy™ Devices
Provides a seamless and low risk migration path from Intel® FPGA, Intel® eASIC™ or structured ASIC devices to a lower unit cost cell-based ASIC.
Benefits
Lower Power and Unit Cost
Provides unit-cost and power reductions compared to FPGA by replacing SRAM configuration logic with patented single-via customization technology and disconnecting power from unused device structures.
Time Advantage
Faster time to market and turnaround time than traditional ASICs due to simplified design flow, customization of only a few mask layers, and when feasible no PCB change from base FPGA designs.
High Performance
The structured ASIC combines logic, memory, DSP, high-speed memory interfaces, and high-speed transceivers (up to 28 Gbps) for high-performance data plane or control plane applications.
Broad IP Support
A wealth of fully verified eASIC-ready IP cores from Intel and third-party alliance partners.
Simplified Design Flow
Intel® eASIC™ device eTools offer a framework for design conversion and validation using a combination of internally developed and industry standard third-party tools.
Market Applicability
Intel® eASIC™ devices offer custom low power1 2 3 4 5 6 solutions for a broad range of end markets such as 5G wireless, networking, military, cloud and storage, machine learning inference, consumer, video and broadcast and automotive applications.
Documentation
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Product and Performance Information
Performance varies by use, configuration and other factors. Learn more at www.Intel.sg/PerformanceIndex.
Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available security updates. See backup for configuration details. No product or component can be absolutely secure.
No product or component can be absolutely secure.
Your costs and results may vary.
Results have been estimated or simulated.
Statements in this document that refer to future plans or expectations are forward-looking statements. These statements are based on current expectations and involve many risks and uncertainties that could cause actual results to differ materially from those expressed or implied in such statements. For more information on the factors that could cause actual results to differ materially, see our most recent earnings release and SEC filings at www.intc.com.