mSGDMA |
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2017.06.20.09:04:20 | Datasheet |
clk | mSGDMA |
dma_read_master | dma_write_master | |
Data_Read_Master | Data_Write_Master | |
dispatcher_read | ||
CSR | ||
Descriptor_Slave | ||
dispatcher_write | ||
CSR | ||
Descriptor_Slave | ||
freq_counter_0 | ||
csr | ||
prbs_pattern_checker | ||
csr | ||
prbs_pattern_generator | ||
csr | ||
timer_0 | ||
s1 |
Parameters
|
Software Assignments(none) |
mm_bridge_slv | m0 | dispatcher_read | |
CSR | |||
m0 | |||
Descriptor_Slave | |||
dma_read_master | Response_Source | ||
Read_Response_Sink | |||
clk | clk | ||
clock | |||
clk_reset | |||
clock_reset | |||
Read_Command_Source | dma_read_master | ||
Command_Sink |
Parameters
|
Software Assignments
|
mm_bridge_slv | m0 | dispatcher_write | |
CSR | |||
m0 | |||
Descriptor_Slave | |||
dma_write_master | Response_Source | ||
Write_Response_Sink | |||
clk | clk | ||
clock | |||
clk_reset | |||
clock_reset | |||
Write_Command_Source | dma_write_master | ||
Command_Sink |
Parameters
|
Software Assignments
|
dispatcher_read | Read_Command_Source | dma_read_master | |
Command_Sink | |||
clk | clk | ||
Clock | |||
clk_reset | |||
Clock_reset | |||
Data_Source | prbs_pattern_checker | ||
st_pattern_input | |||
Response_Source | dispatcher_read | ||
Read_Response_Sink |
Parameters
|
Software Assignments(none) |
dispatcher_write | Write_Command_Source | dma_write_master | |
Command_Sink | |||
timing_adapter | out | ||
Data_Sink | |||
clk | clk | ||
Clock | |||
clk_reset | |||
Clock_reset | |||
Response_Source | dispatcher_write | ||
Write_Response_Sink |
Parameters
|
Software Assignments(none) |
mm_bridge_slv | m0 | freq_counter_0 |
csr | ||
clk | clk | |
clock | ||
clk | ||
sample_clock | ||
clk_reset | ||
reset |
Parameters
|
Software Assignments(none) |
clk | clk | mm_bridge_slv | |
clk | |||
clk_reset | |||
reset | |||
m0 | dispatcher_write | ||
CSR | |||
m0 | |||
Descriptor_Slave | |||
m0 | dispatcher_read | ||
CSR | |||
m0 | |||
Descriptor_Slave | |||
m0 | prbs_pattern_generator | ||
csr | |||
m0 | prbs_pattern_checker | ||
csr | |||
m0 | freq_counter_0 | ||
csr | |||
m0 | timer_0 | ||
s1 |
Parameters
|
Software Assignments(none) |
mm_bridge_slv | m0 | prbs_pattern_checker |
csr | ||
dma_read_master | Data_Source | |
st_pattern_input | ||
clk | clk | |
clock | ||
clk_reset | ||
reset |
Parameters
|
Software Assignments(none) |
mm_bridge_slv | m0 | prbs_pattern_generator | |
csr | |||
clk | clk | ||
clock | |||
clk_reset | |||
reset | |||
st_pattern_output | timing_adapter | ||
in |
Parameters
|
Software Assignments(none) |
mm_bridge_slv | m0 | timer_0 |
s1 | ||
clk | clk | |
clk | ||
clk_reset | ||
reset |
Parameters
|
Software Assignments
|
prbs_pattern_generator | st_pattern_output | timing_adapter | |
in | |||
clk | clk | ||
clk | |||
clk_reset | |||
reset | |||
out | dma_write_master | ||
Data_Sink |
Parameters
|
Software Assignments(none) |
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