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Packet Processing is Enhanced with Software from Intel® DPDK

Improvements to multi-core architecture make packet processing viable on Intel® processors, resulting in high performance and reduced hardware costs.

Wind River Intelligent Network Platform* Presentation

Presentation: Trends, implications, and use case solutions based on the Wind River Intelligent Network Platform*. (v.1, Mar. 2014)

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Cedarview Norco B3 Board Platform Intel® BLDK: Release Notes

Release Notes: Cedarview Norco B3 Intel® Boot Loader Development Kit release notes provide overview of kit, features, configuration, issues, and more.

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AES CBC Encrypt/Decrypt for Sandy Bridge

Source Code: AES CBC Encrypt Multibuffer / Decrypt Single Buffer optimized for Sandy Bridge

Intel® Data Plane Development Kit Optimizes Packet Processing

Presentation: The Intel® Data Plane Development Kit enables multi-workloads on single architecture optimized for packet processing. (v.001, Dec. 2012)

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Software: Fast CRC16 Code for T10 DIF

Software: Use this optimized function to compute a 16-bit cyclic redundancy check as defined in the T10 DIF standard using PCLMULQDQ instruction.

Optimized ISCSI CRC Using CRC32 Instruction Software

Software: Optimized code to compute the Internet Small Computer System Interface cyclic redundancy check using CRC32 and PCLMULQDQ instructions.

Intel® Multi-Buffer Crypto for IPSec: Install Package

Install Package: Download the Intel® Multi-Buffer Crypto for IPSec, including a comprehensive library of functions for different Intel® architectures.

Intel® Data Plane Development Kit: API Reference

API Reference: Depreciated list, data structure documentation, and file documentation for the Intel® Data Plane Development Kit. (v.001, Nov. 2012)

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Large Integer Squaring on Intel® Architecture Processors

White Paper: Critical operations in large integer arithmetic using new instructions on Intel® processors for fast implementation. (v.001, Jan. 2013)

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