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Built-in Visual Features Deliver Stunning Content

The visual features built into the processor deliver everything you need to enjoy a stunning and seamless experience when viewing content on your PC.

Two-Factor Authentication in Intel® IPT

Simplify two-factor VPN authentication with Intel® IPT with one-time password, removing the need for a separate physical token for no delays.

Intel presents Cedar Trail next-gen Atom platform at IDF 2011

Video: Intel presents Cedar Trail next-gen Atom™ platform at IDF 2011.

Migration Solutions for Embedded Intel® Architecture

Klocwork* analyzes source code and inspects codebase before Intel® architecture migration, minimizing cost, effort, and complexity. (v.001, Oct. 2011)

Debugging Processor Reorder Buffer Timeout: Guide

Guide: Describes processor reorder buffer timeout and provides methodology for debugging these types of system issues. (v.1, Oct. 2010)

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Gate Dielectric Scaling for High-Performance CMOS: SiO2 to High-K

Gate Dielectric Scaling for High-Performance CMOS: SiO2 to High-K, an option for the 45nm high-performance logic technology node.

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Strained Germanium QWFE Transistor as P-Channel Device Option for Low Power III-V CMOS Architecture

Demonstrates a Germanium p-channel QWFET with thin scaled TOXE and high mobility, delivering four times higher hole mobility.

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Advanced Metal Gate/High-K Dielectric Stacks for CMOS Transistors

Paper: n-type and p-type metal electrodes on high-K gate dielectrics enable same oxide thickness, desirable transistor threshold, and more.

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Advanced High-K Gate Dielectric for Short-Channel in QWFE Transistors on Silicon Substrate

Paper: composite high-K gate in the QWFET silicon substrate integration for thin electrical oxide, low gate leakage, and carrier confinement.

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Role of High-K Gate Dielectrics

Presentation Discusses Role of High-K Gate Dielectrics and Metal Gate Electrodes in Emerging Nanoelectronic Devices.

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